1. Field of the Invention
The present invention relates to improved methods of fabrication of CMOS read only memories. Particularly, it relates to a method of forming double field guard rings, a method of forming a PMOS buried channel, and a method of preventing aluminum spiking.
2. Background Art
Methods of fabricating CMOS devices with guard rings are well-known in the art. See, for example, Gasner, et al., U.S. Pat. No. 4,135,955. In Gasner, et al., a P- well is formed in an N type and through the successive application of masking layers and diffusion steps guard rings are created. The presence of the guard rings results in higher performance. However, this method is not applicable to an N- well in a P substrate.
A problem common to PMOS devices is the mobility of carriers in the channel region between the source and the drain. In the past the electric field created during operation of a field effect transistor would pull holes up to this channel creating a very shallow surface inversion layer which provided low carrier mobility. In this method N type starting material was used and a low dose P type implant into the channel was performed, creating an N-- layer. Another method used is forming the region out of N-- material. However, a method of performing an ion implant in this channel region, which would create a permanent P type high mobility channel with more depth would allow the CMOS device to be driven faster.
A cause of failure in NMOS devices is aluminum spiking. In this problem the aluminum of the metallization combines through the contact with the material of the N+ source and drain of field effect transistors, causing them to be driven through to the substrate underneath. As a result there is created a short circuit between the metallization and contact layer and the substrate beneath the source and drain.
It is therefore an object of this invention to achieve an N- well process in a P substrate with higher performance.
Another object of this invention is to provide a method for producing N- well CMOS process substrate with double field guard rings in order to permit the operation of higher performance CMOS devices reliably in the 10 to 20 volt range.
A further object of this invention is to provide a method for producing a permanent high mobility PMOS buried channel between the source and drains of field effect transistors.
It is an additional object of this invention to provide a method for preventing aluminum spiking between the metallization and contact layer of CMOS devices and the substrate beneath the source and drains.